Detecting circuit for detecting memory chip
AssigneeNanya Technology Corporation
InventorsYan-De LIN, Jui-Hsiu JAO
Life of this patent
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Abstract
A method for detecting a memory chip includes the following steps coupling a detecting circuit to a first area and a second area of the memory chip, the second area is not overlapped with the first area; inputting a first detecting signal from the detecting circuit to the first area of the memory chip; burning out a cell of the detecting circuit; and inputting a second detecting signal from the detecting circuit to the second area of the memory chip.
Claims15
A detecting circuit for detecting a memory chip, comprising:
- an input pad, coupled to a first area of the memory chip, wherein the input pad is configured to input a first detecting signal to the first area of the memory chip;
- and
- a cell, coupled to the input pad and a second area of the memory chip, wherein the second area is not overlapped with the first area;
- wherein the cell is burned out such that the input pad inputs a second detecting signal to the second area of the memory chip.
A detecting circuit for detecting a memory chip, wherein the memory chip comprises word lines and bit lines, the detecting circuit comprising:
- a first detecting circuit coupled to the word lines for detecting the word lines, comprising:
- a first input pad coupled to a first area of the memory chip and configured to input a first detecting signal to the first area of the memory chip;
- and
- a first cell coupled to the first input pad and a second area of the memory chip, wherein the second area is not overlapped with the first area;
- wherein the first cell is burned out such that the first input pad inputs a second detecting signal to the second area of the memory chip;
- and
- a second detecting circuit coupled to the bit lines for detecting the bit lines, comprising:
- a second input pad coupled to a third area of the memory chip and configured to input a third detecting signal to the third area of the memory chip;
- and
- a second cell coupled to the second input pad and a fourth area of the memory chip, wherein the fourth area is not overlapped with the third area;
- wherein the second cell is burned out such that the second input pad inputs a fourth detecting signal to the fourth area of the memory chip.
Dependencies are inferred from the claim text.