Semiconductor structure and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Lung TUNG, Xiaodong WANG, Jhon-Jhy LIAW
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Abstract
A semiconductor structure includes a first active region, a second active region and a dielectric wall. The second active region is disposed adjacent to the first active region, wherein there is a space between the first active region and the second active region. The dielectric wall is formed within the space between the first active region and the second active region. The dielectric wall has a first wall width and a second wall width different from the first wall width.
Claims20
A semiconductor structure, comprising:
- a first active region comprising a plurality of first active channel layers vertically stacked;
- a second active region disposed adjacent to the first active region and comprising a plurality of second active channel layers vertically stacked, wherein there is a space between the first active region and the second active region;
- a metal gate formed on the first active region and the second active region;
- and
- a dielectric wall formed within the space between the first active region and the second active region;
- wherein the dielectric wall has a first wall width and a second wall width different from the first wall width.
A semiconductor structure, comprising:
- a first active region comprising a plurality of first active channel layers vertically stacked;
- a second active region disposed adjacent to the first active region and comprising a plurality of second active channel layers vertically stacked, wherein there is a space between the first active region and the second active region;
- and
- a dielectric wall formed within the space between the first active region and the second active region, and comprising a first wall portion and a second wall portion, wherein the first wall portion has a first lateral surface, the second wall portion protrudes with respect to the first lateral surface of the first wall portion.
A manufacturing method of a semiconductor structure, comprising:
- forming a first fin structure and a second fin structure adjacent to the first fin structure, wherein the first fin structure comprising a plurality of first sheets and a plurality of first spacers, the second fin structure comprising a plurality of second sheets and a plurality of second spacer, the first sheets and the first spacers are stacked to each other, the second sheets and the second spacers are stacked to each other, and there is a space between the first fin structure and the second fin structure;
- and
- forming a dielectric wall within the space between the first fin structure and the second fin structure, wherein the dielectric wall has a first wall width and a second wall width different from the first wall width.
Dependencies are inferred from the claim text.