Devices including stacked nanosheet transistors
AssigneeSamsung Electronics Co., Ltd.
InventorsJeonghyuk Yim, Byounghak Hong, Jungsu Kim, Kang-ill Seo
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Abstract
Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.
Claims20
A method of forming a nanosheet transistor device, the method comprising:
- forming a preliminary transistor stack comprising a plurality of lower nanosheets and a plurality of upper nanosheets on the plurality of lower nanosheets;
- forming a recess in the preliminary transistor stack by removing a first portion of the plurality of lower nanosheets or a first portion of the plurality of upper nanosheets;
- and
- forming an insulation region in the recess,
- wherein the insulation region contacts a second portion of the plurality of lower nanosheets that remains after removing the first portion of the plurality of lower nanosheets, or a second portion of the plurality of upper nanosheets that remains after removing the first portion of the plurality of upper nanosheets.
A method of forming a nanosheet transistor device, the method comprising:
- forming a preliminary transistor stack comprising a plurality of lower nanosheets and a plurality of upper nanosheets on the plurality of lower nanosheets;
- forming a first recess and a second recess in the preliminary transistor stack;
- forming a first spacer in the first recess;
- and
- forming a second spacer in the second recess,
- wherein the first spacer overlaps the plurality of lower nanosheets and the plurality of upper nanosheets in a vertical direction, and
- wherein the second spacer overlaps the plurality of lower nanosheets in the vertical direction.
A method of forming a nanosheet transistor device, the method comprising:
- forming a preliminary transistor stack comprising a plurality of lower nanosheets and a plurality of upper nanosheets on the plurality of lower nanosheets;
- forming a first recess and a second recess in a first side of the preliminary transistor stack;
- forming a third recess and a fourth recess in a second side of the preliminary transistor stack, wherein the second side is opposite to the first side in a horizontal direction;
- forming a first spacer in the first recess and a second spacer in the second recess;
- and
- forming a third spacer in the third recess,
- wherein the first spacer has a length that is greater than a length of the third spacer in a vertical direction that is perpendicular to the horizontal direction.
Dependencies are inferred from the claim text.