Semiconductor package structure comprising photonic ic chip adjacent to electrical ic chip
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChan-Hong Chern
Life of this patent
Estimating the term…
Abstract
Various embodiments of the present disclosure are directed towards a semiconductor package structure including a first integrated circuit (IC) chip overlying a base structure. An electrical IC chip overlies the base structure and is disposed around the first IC chip. The electrical IC chip is electrically coupled to the first IC chip. A photonic IC chip overlies the base structure and is electrically coupled to the electrical IC chip. The photonic IC chip is configured to receive an input optical signal. The photonic IC chip is adjacent to the electrical IC chip.
Claims20
A semiconductor package structure, comprising:
- a first integrated circuit (IC) chip overlying a base structure;
- an electrical IC chip overlying the base structure and disposed around the first IC chip, wherein the electrical IC chip is electrically coupled to the first IC chip;
- and
- a photonic IC chip overlying the base structure and electrically coupled to the electrical IC chip, wherein the photonic IC chip is configured to receive an input optical signal, wherein the photonic IC chip is adjacent to the electrical IC chip.
A semiconductor package structure, comprising:
- an interposer overlying a package substrate;
- one or more electrical integrated circuit (IC) chips overlying and coupled to the interposer;
- a first IC chip overlying the interposer and coupled to the one or more electrical IC chips, wherein the first IC chip is spaced laterally between opposing sidewalls of the one or more electrical IC chips;
- and
- a plurality of photonic IC chips overlying the interposer and electrically coupled to the one or more electrical IC chips, wherein the plurality of photonic IC chips are disposed at a peripheral region of the interposer and surround the first IC chip, wherein a lateral distance between each photonic IC chip in the plurality of photonic IC chips and the one or more electrical IC chips is less than a width of an individual photonic IC chip in the plurality of photonic IC chips.
A method of forming a semiconductor package structure, comprising:
- bonding one or more electrical integrated circuit (IC) chips to an interposer;
- bonding a memory IC chip to the interposer, wherein the memory IC chip is spaced between sidewalls of the one or more electrical IC chips;
- and
- bonding a plurality of photonic IC chips to the interposer, wherein the plurality of photonic IC chips are configured to receive an input optical signal and generate an electrical signal corresponding to the input optical signal, wherein the photonic IC chips are disposed adjacent to the one or more electrical IC chips, wherein the one or more electrical IC chips are configured to receive the generated electrical signal.
Dependencies are inferred from the claim text.