Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsKwangsoo Kim, Hyunsoo Chung, Jungul Hwang
Life of this patent
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Abstract
Provided is a semiconductor package including a first redistribution layer, a first semiconductor chip disposed on the first redistribution layer, a circuit board disposed between the first redistribution layer and the first semiconductor chip, bonding wires connecting the first semiconductor chip and the circuit board to each other, a second redistribution layer disposed on the first semiconductor chip, a second semiconductor chip disposed on the second redistribution layer, and conductive posts connecting the first redistribution layer and the second redistribution layer to each other.
Claims20
A semiconductor package comprising:
- a first redistribution layer;
- a first semiconductor chip disposed on the first redistribution layer;
- a circuit board disposed between the first redistribution layer and the first semiconductor chip;
- a plurality of bonding wires connecting the first semiconductor chip and the circuit board to each other;
- a second redistribution layer disposed on the first semiconductor chip;
- a second semiconductor chip disposed on the second redistribution layer;
- and
- a plurality of conductive posts connecting the first redistribution layer and the second redistribution layer to each other.
A semiconductor package comprising:
- a lower structure;
- an upper structure stacked on the lower structure;
- and
- a plurality of external connection terminals disposed under the lower structure,
- wherein the lower structure comprises:
- a first redistribution layer;
- a first semiconductor chip disposed on the first redistribution layer;
- a plurality of bonding wires connecting the first semiconductor chip and the first redistribution layer to each other;
- and
- a plurality of conductive posts connecting the first redistribution layer and the upper structure to each other,
- wherein the upper structure comprises:
- a second redistribution layer disposed on the lower structure;
- a second semiconductor chip disposed on the second redistribution layer;
- and
- a plurality of bumps disposed between the second semiconductor chip and the second redistribution layer.
A semiconductor package comprising:
- a first redistribution layer;
- a first semiconductor chip and a second semiconductor chip, spaced apart from each other in a first direction on the first redistribution layer;
- a first circuit board disposed between the first redistribution layer and the first semiconductor chip;
- a second circuit board disposed between the first redistribution layer and the second semiconductor chip;
- first bonding wires connecting the first semiconductor chip and the first circuit board to each other;
- second bonding wires connecting the second semiconductor chip and the second circuit board to each other;
- a plurality of first bumps disposed on the first redistribution layer, wherein the first circuit board is disposed on a first set of the plurality of first bumps and the second circuit board is disposed on a second set of the plurality of first bumps;
- a second redistribution layer disposed on the first semiconductor chip;
- a third semiconductor chip and a fourth semiconductor chip, spaced apart from each other in the first direction on the second redistribution layer;
- a plurality of second bumps disposed on the second redistribution layer, wherein the third semiconductor chip is disposed on a first set of the plurality of second bumps and the fourth semiconductor chip is disposed on a second set of the plurality of second bumps;
- a plurality of conductive posts connecting the first redistribution layer and the second redistribution layer to each other;
- and
- a plurality of external connection terminals disposed under the first redistribution layer,
- wherein the first semiconductor chip is connected to the first redistribution layer through the first bonding wires and the first circuit board, and
- the third semiconductor chip is attached to the second redistribution layer, in a flip-chip structure.
Dependencies are inferred from the claim text.