Integrated circuit package and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYan-Zuo Tsai, Ming-Tsu Chung, Yang-Chih Hsueh, Yung-Chi Lin
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Abstract
A package includes a first die over and bonded to a first side of a second die, where the second die includes a first substrate, a first interconnect structure over the first substrate, a seal ring disposed within the first interconnect structure, first dummy through substrate vias (TSVs) extending through edge regions of the first substrate of the second die and in physical contact with the seal ring, and functional TSVs extending through a central region of the first substrate of the second die.
Claims20
A package comprising:
- a first die over and bonded to a first side of a second die, wherein the second die comprises:
- a first substrate;
- a first interconnect structure over the first substrate;
- a seal ring disposed within the first interconnect structure;
- first dummy through substrate vias (TSVs) extending through edge regions of the first substrate of the second die and in physical contact with the seal ring;
- and
- functional TSVs extending through a central region of the first substrate of the second die.
A package comprising:
- a first die comprising:
- a first substrate;
- a first interconnect structure on the first substrate;
- a first seal ring disposed within the first interconnect structure;
- and
- first dummy through substrate vias (TSVs) extending through edge regions of the first substrate of the first die, wherein the first dummy TSVs overlap the first seal ring;
- and
- a second die disposed below the first die, the first die being bonded to a first side of the second die, the second die comprising:
- a second substrate;
- functional TSVs extending through a central region of the second substrate of the second die;
- a second interconnect structure on the second substrate;
- a second seal ring disposed within the second interconnect structure;
- and
- second dummy TSVs extending through edge regions of the second substrate of the second die, wherein the second dummy TSVs are disposed to be around the functional TSVs.
A method of manufacturing a semiconductor device, the method comprising:
- forming a top die, wherein forming the top die comprises:
- forming a device layer on a front side of a substrate;
- forming first dummy through substrate vias (TSVs) that extend through edge regions of the device layer and the substrate;
- forming functional (TSVs) that extend through central regions of the device layer and the substrate, wherein the first dummy TSVs are disposed around the functional TSVs;
- and
- forming an interconnect structure over the front side of the substrate, wherein forming the interconnect structure comprises forming a seal ring that overlaps and is in physical contact with the first dummy TSVs;
- and
- bonding the top die to a bottom die, wherein bonding the top die to the bottom die comprises bonding a first bond pad of the top die to a second bond pad of the bottom die.
Dependencies are inferred from the claim text.