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US 2025/0061934 A1Published application
Memory refresh
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorPerng-Fei YUH
Life of this patent
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Abstract
Limiting a leakage current of a memory device is provided. A sensing current that is a representative of a leakage current of a memory cell array of a memory device is generated. A reference current having a preset value is generated. The sensing current is compared with the reference current. An enable signal is generated based on the comparison. A bias voltage applied to a plurality of word lines of the memory cell array is adjusted based on the enable signal.
Claims20
A feedback circuit comprising:
- a reference cell array operative to generate a sensing current that is representative of a leakage current of a memory device;
- a reference current generator operative to generate a reference current having a preset value;
- a comparator operative to compare the reference current with the sensing current and provide an enable signal based on the comparison;
- and
- a negative voltage generator operative to generate a bias voltage based on the enable signal, wherein the bias voltage is applied to a plurality of word lines of the memory device in a standby mode.
2 more elements
A memory device, comprising:
- a memory cell array comprising a matrix of a plurality of rows and a plurality of columns, wherein each row of the plurality of rows comprises a first plurality of memory cells connected to a word line of a plurality of word lines, and wherein each column of the plurality of columns comprises a second plurality of memory cells connected to a bit line of a plurality of bit lines;
- and
- a first feedback circuit operative to provide a bias voltage to the plurality of word lines during a standby mode, wherein the feedback circuit limits the leakage current of the memory cell array to a preset value.
A method of limiting a leakage current of a memory device, the method comprising:
- generating a sensing current that is a representative of a leakage current of a memory cell array of a memory device;
- generating a reference current having a preset value;
- comparing the sensing current with the reference current;
- generating, based on the comparison, an enable signal;
- and
- adjusting a bias voltage applied to a plurality of word lines of the memory cell array based on the enable signal.
3 more elements
Dependencies are inferred from the claim text.