An electronic rectifier circuit for adaptive gate voltage regulation of a synchronous rectifier field-effect transistor

An electronic rectifier circuit comprising:

• a synchronous rectifier field-effect transistor (SR FET);
• wherein the electronic rectifier circuit is configured for adaptive gate voltage (Vg) regulation of the SR FET;
• wherein the electronic rectifier circuit is configured to clamp a drain-source voltage (Vds), of the SR FET to a first regulation voltage (Vreg1), while the SR FET is switched on for less than a threshold time in a current switching cycle;
• wherein the electronic rectifier circuit is configured to clamp the Vds of the SR FET to a second regulation voltage (Vreg2), while the SR FET is switched on for more than the threshold time in the current switching cycle;
• wherein the threshold time is configured as a portion of time that the SR FET was switched on in one or more previous switching cycles;
• and
• wherein Vreg2 is smaller than Vreg1.