US 2025/0053454 A1 · METHODS AND APPARATUS FOR A MACHINE LEARNING MODEL DECOMPRESSION ACCELERATOR

Abstract

Systems, apparatus, articles of manufacture, and methods are disclosed for a machine learning model decompression accelerator. An example apparatus includes a processor core including at least one matrix multiplication engine, a memory storing a plurality of tiles of compressed data of a machine learning model to be processed by the at least one matrix multiplication engine; and a decompression accelerator including one or more control registers in communication with the processor core, a processing engine in communication with the memory and configured by the one or more control registers to decompress the plurality of tiles of the compressed data, and an output register to store decompressed data, wherein the processor core is to read the decompressed data from the output register and cause the at least one matrix multiplication engine to perform matrix multiplication with the decompressed data for execution of the machine learning model.

Claims21

Dependent claims

An apparatus comprising:

a processor core including at least one matrix multiplication engine;
memory storing a plurality of tiles of compressed data of a machine learning model to be processed by the at least one matrix multiplication engine;
and
a decompression accelerator including:
one or more control registers in communication with the processor core;
a processing engine in communication with the memory and configured by the one or more control registers to decompress the plurality of tiles of the compressed data;
and
an output register to store decompressed data, wherein the processor core is to read the decompressed data from the output register and cause the at least one matrix multiplication engine to perform matrix multiplication with the decompressed data for execution of the machine learning model.

5 more elements

A decompression accelerator comprising:

one or more control registers in communication with a processor core including at least one matrix multiplication engine;
a processing engine in communication with memory and configured by the one or more control registers to decompress a plurality of tiles of compressed data of a machine learning model;
and
an output register to store decompressed data, wherein the processor core is to read the decompressed data from the output register and perform matrix multiplication operations with the decompressed data for execution of the machine learning model.

1 more element

A non-transitory machine readable storage medium comprising instructions to cause programmable circuitry to at least:

cause one or more control registers to communicate with a processor core including at least one matrix multiplication engine;
decompress a plurality of tiles of compressed data of a machine learning model;
and
cause an output register to store decompressed data, wherein the processor core is to read the decompressed data from the output register and perform matrix multiplication operations with the decompressed data for execution of the machine learning model.

1 more element

Dependencies are inferred from the claim text.

Methods and apparatus for a machine learning model decompression accelerator

Life of this patent

Methods and apparatus for a machine learning model decompression accelerator

Life of this patent

Abstract

Claims21