Mask generation model training method, mask generation method and apparatus, and storage medium

A computer device, comprising:

• a processor and a memory, the memory being configured to store a computer program that, when executed by the processor, causes the computer device to perform a mask generation model training method including:
• obtaining a training sample set, each training sample comprising a target layout of a chip sample and a mask of the target layout;
• using, for at least one training sample in the training sample set, a target layout of a chip sample in the training sample as an input of a mask generation model, to obtain a predicted mask of the target layout;
• inputting the predicted mask of the target layout into a photolithography physical model, to obtain a wafer pattern corresponding to the predicted mask of the target layout;
• determining complexity of the predicted mask of the target layout based on a sum of perimeters of a plurality of graphics comprised in the target layout of the chip sample and a perimeter of the predicted mask of the target layout;
• and
• adjusting a parameter of the mask generation model based on the target layout of the chip sample, the wafer pattern corresponding to the predicted mask of the target layout, the mask of the target layout, the predicted mask of the target layout, and the complexity of the predicted mask of the target layout until a training stop condition is met, to obtain a trained mask generation model.

A non-transitory computer-readable storage medium, comprising a computer program, the computer program, when executed by a processor of a computer device, causing the computer device to perform a method for designing component arrangement on a chip layout including:

• obtaining a training sample set, each training sample comprising a target layout of a chip sample and a mask of the target layout;
• using, for at least one training sample in the training sample set, a target layout of a chip sample in the training sample as an input of a mask generation model, to obtain a predicted mask of the target layout;
• inputting the predicted mask of the target layout into a photolithography physical model, to obtain a wafer pattern corresponding to the predicted mask of the target layout;
• determining complexity of the predicted mask of the target layout based on a sum of perimeters of a plurality of graphics comprised in the target layout of the chip sample and a perimeter of the predicted mask of the target layout;
• and
• adjusting a parameter of the mask generation model based on the target layout of the chip sample, the wafer pattern corresponding to the predicted mask of the target layout, the mask of the target layout, the predicted mask of the target layout, and the complexity of the predicted mask of the target layout until a training stop condition is met, to obtain a trained mask generation model.