Handling lbt failure in sidelink communication

A processor for wireless communication, comprising:

• at least one controller coupled with at least one memory and configured to cause the processor to:
• generate a hybrid automatic repeat request (HARQ) feedback based on a data transmission received from a sidelink (SL) transmitter user equipment (UE-t);
• perform a Clear Channel Assessment (CCA);
• increment a counter based on a negative CCA result;
• and
• transmit a message to the SL UE-t based at least in part on the counter reaching a predefined value, the message comprising CCA failure information for a Resource Block (RB) set.

A user equipment (UE) for wireless communication, comprising:

• at least one memory;
• and
• at least one processor coupled with the at least one memory and configured to cause the UE to:
• transmit, to a sidelink (SL) receiver UE (UE-r), a SL data transmission on a first resource block (RB) set;
• receive, from the SL UE-r, a message on a second RB set, the message comprising Clear Channel Assessment (CCA) failure information for the first RB set;
• and
• perform a retransmission of the SL data transmission based on the CCA failure information.

A processor for wireless communication, comprising:

• at least one controller coupled with at least one memory and configured to cause the processor to:
• transmit, to a sidelink (SL) receiver UE (UE-r), a SL data transmission on a first resource block (RB) set;
• receive, from the SL UE-r, a message on a second RB set, the message comprising Clear Channel Assessment (CCA) failure information for the first RB set;
• and
• perform a retransmission of the SL data transmission based on the CCA failure information.