Semiconductor devices and manufacturing methods thereof, chip package structures

A chip package structure, comprising:

• a packaging substrate;
• a package housing;
• and
• a semiconductor device comprising:
• a conductive layer comprising a first pad;
• a composite structure located on the conductive layer and stacked in a direction perpendicular to a plane in which the conductive layer is located, the composite structure comprising:
• a chip, an insulating layer surrounding the chip, and a second pad electrically connected with the chip and over the insulating layer, the second pad of the composite structure being at different locations in a first direction, and the first direction being perpendicular to a thickness direction of the composite structure;
• and
• a conductive post located in the insulating layer of the composite structure, the conductive post connecting the second pad and the first pad;
• wherein the packaging substrate is attached to a side of the conductive layer away from the composite structure in the semiconductor device, and the package housing is snap-fitted on the composite structure and attached to the packaging substrate.

A manufacturing method of a semiconductor device comprising:

• stacking a composite structure, the composite structure comprising:
• a chip, an insulating layer surrounding the chip, and a second pad connected with the chip and the insulating layer, a number of second pads of the composite structure being at different locations in a first direction, and the first direction being perpendicular to a thickness direction of the composite structure;
• etching the insulating layer of the composite structure with an etching process to form holes exposing the second pads;
• forming a conductive post in the holes, the conductive post contacting the second pad exposed by the holes;
• and
• forming a conductive layer on the composite structure, the conductive layer comprising a first pad connected with the conductive post.