Metal-insulator-metal capacitor via structures

A semiconductor device, comprising:

• a metal-insulator-metal capacitor;
• and
• at least one interconnect structure disposed between a first metallization level and a second metallization level, wherein:
• the at least one interconnect structure comprises a first via and a second via extended from the first via;
• the second via contacts one or more electrodes of the metal-insulator-metal capacitor;
• and
• side surfaces of the first via are sloped differently from side surfaces of the second via.

A semiconductor device, comprising:

• a metal-insulator-metal capacitor;
• at least two vias connected between a first pair of metal lines respectively corresponding to a first metallization level and a second metallization level, wherein one of the at least two vias contacts a first electrode and a second electrode of the metal-insulator-metal capacitor, and the at least two vias have different shapes from each other;
• and
• at least two other vias connected between a second pair of metal lines respectively corresponding to the first metallization level and the second metallization level, wherein the at least two other vias are isolated from the at least two vias, one of the at least two other vias contacts at least a third electrode of the metal-insulator-metal capacitor, and the at least two other vias have different shapes from each other.