Non-linear memory failure analysis method and memory test apparatus

A memory test apparatus for performing a memory failure analysis method, the memory test apparatus comprising:

• a controller;
• a window register configured to store information on a test area of a memory under test (MUT) set by the controller;
• a first failure detector and a second failure detector configured to provide a test result for the test area and store failure information extracted from the provided test result;
• and
• a failure accumulator in which the stored failure information is compressed, updated, and stored using the failure information stored in the first failure detector and the second failure detector,
• wherein the first failure detector and the second failure detector alternately perform a process of storing the failure information and a process of compressing, updating, and storing the failure information.