Semiconductor devices and manufacturing methods thereof and memory systems

A semiconductor device, comprising:

• a memory stack layer that comprises at least one gate layer and at least one gate dielectric layer disposed alternately along a first direction;
• memory channel structures penetrating through the memory stack layer along the first direction;
• a top selective gate layer disposed on a side of the memory stack layer in the first direction;
• and
• top selective gate cut lines penetrating through at least part of the top selective gate layer along the first direction, wherein sizes of bottoms of the top selective gate cut lines close to the memory stack layer in a second direction are greater than sizes of tops of the top selective gate cut lines far away from the memory stack layer in the second direction, and the first direction intersects the second direction.

A memory system, comprising:

• a memory comprising:
• a semiconductor device, comprising:
• a memory stack layer that comprises at least one gate layer and at least one gate dielectric layer disposed alternately along a first direction;
• memory channel structures penetrating through the memory stack layer along the first direction;
• a top selective gate layer disposed on a side of the memory stack layer in the first direction;
• and
• top selective gate cut lines penetrating through at least part of the top selective gate layer along the first direction, wherein sizes of bottoms of the top selective gate cut lines close to the memory stack layer in a second direction are greater than sizes of tops of the top selective gate cut lines far away from the memory stack layer in the second direction, and the first direction intersects the second direction, and
• a controller connected with the memory and configured to control the memory.