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US 2024/0407155 A1Published application
Semiconductor memory device
AssigneeNanya Technology Corporation
InventorsKuo Chung HSU, En-Jui LI
Life of this patent
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Abstract
A semiconductor memory device includes a substrate, a memory cell contact formed over the substrate, a bit line conductive structure formed over the substrate and a dielectric spacer located between the memory cell contact and the bit line conductive structure. The dielectric spacer includes an air gap having a rectangular cross-section, and the rectangular cross-section has a height H and a width W, wherein a H/W ratio is equal to or greater than 40.
Claims20
A semiconductor memory device comprising:
- a substrate;
- a memory cell contact formed over the substrate;
- a bit line conductive structure formed over the substrate;
- and
- a dielectric spacer disposed between the memory cell contact and the bit line conductive structure, wherein the dielectric spacer comprises an air gap having a rectangular cross-section, the rectangular cross-section has a height H and a width W, a H/W ratio is equal to or greater than 40.
2 more elements
A semiconductor memory device comprising:
- a substrate;
- a memory cell contact formed over the substrate;
- a bit line conductive structure formed over the substrate;
- and
- a dielectric spacer disposed between the memory cell contact and the bit line conductive structure, wherein the dielectric spacer comprises an air gap;
- and
- a byproduct of a thermal decomposable layer disposed in the air gap.
4 more elements
A semiconductor memory device comprising:
- a substrate;
- a memory cell contact formed over the substrate;
- a bit line conductive structure formed over the substrate;
- and
- a dielectric spacer disposed between the memory cell contact and the bit line conductive structure, wherein the dielectric spacer comprises an air gap;
- and
- a thermal reside of a thermal decomposable layer disposed in the air gap.
4 more elements
Dependencies are inferred from the claim text.