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US 2024/0405669 A1Published application
Internal Ramp Voltage Generator for the Soft Start of DC-DC Converter
AssigneeReed Semiconductor Corporation
InventorsJiwei Fan, Yingqian Ma, Yifan Dong
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Abstract
A ramp generator for and method of generating a voltage ramp signal with very long ramping up time on a silicon chip, wherein the method includes a control loop providing a switched-capacitor circuit for generating the voltage ramp signal.
Claims20
An apparatus comprising:
- a soft start voltage buffer configured to generate an output voltage equal to a soft start voltage;
- an offset generator configured to generate a soft start offset voltage equal to a sum of the output voltage of the soft start voltage buffer and a predetermined voltage;
- a switched-capacitor circuit configured to establish the soft start voltage through charge redistribution between two different capacitors of the switched-capacitor circuit;
- and
- a clock generator configured to generate a plurality of control signals for controlling the switched-capacitor circuit.
2 more elements
A method comprising:
- in a first phase of a clock cycle, turning on a first switch and turning off a second switch to charge a first capacitor to a voltage level equal to a sum of a sampled soft start voltage and an offset voltage;
- and
- in a second phase of the clock cycle, turning off the first switch and turning on the second switch to charge a second capacitor through charge redistribution between the first capacitor and the second capacitor.
Dependencies are inferred from the claim text.