Thin film transistor and transistor array substrate

A transistor array substrate comprising:

• a substrate including a display area in which sub-pixels are arranged;
• a circuit layer disposed on the substrate;
• and
• a light emitting element layer disposed on the circuit layer and including light emitting elements disposed in areas corresponding to the sub-pixels, respectively,
• wherein the circuit layer includes pixel driving units electrically connected to the light emitting elements, respectively,
• each of the pixel driving units includes at least one thin film transistor,
• wherein one thin film transistor of the circuit layer includes:
• a semiconductor layer disposed on the substrate and including a channel area, a first conductive area connected to one side of the channel area, and a second conductive area connected to the other side of the channel area;
• a gate insulating layer covering areas other than the first conductive area and the second conductive area in the semiconductor layer;
• a gate electrode disposed on the gate insulating layer and overlapping the channel area in a plan view;
• and
• a first electrode disposed on the gate insulating layer on the one side of the channel area and in contact with a portion of the first conductive area, and
• wherein a first edge of the first electrode facing the gate electrode obliquely intersects a first edge of the gate insulating layer in a plan view.