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US 2024/0405013 A1Published application
Esd circuit with ggnmos transistors having multiple body contact regions
AssigneeNXP B.V.
InventorsGijs Jan de Raad, Guido Wouter Willem Quax
Life of this patent
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Abstract
An electrostatic discharge circuit includes two or more GGNMOS transistors where each transistor includes two types of body contact regions. Body contact regions of one type are non substrate isolated from body contact regions of the other type. A body contact region of one type is electrically coupled to the source region of its transistor and a body contact region of the other type is electrically connected to at least one other body contact region of the same type of another GGNMOS transistor.
Claims20
An electrostatic discharge (ESD) circuit comprising:
- a first grounded gate NMOS (GGNMOS) transistor including:
- a body region in a substrate;
- a source region in the substrate;
- a first body contact region electrically connected to the body region of the first GGNMOS transistor and electrically coupled to the source region of the first GGNMOS transistor;
- a second body contact region electrically connected to the body region of the first GGNMOS transistor and non substrate isolated from first body contact region of the first GGNMOS transistor;
- a second GGNMOS transistor including:
- a body region in the substrate;
- a source region in the substrate;
- a first body contact region electrically connected to the body region of the second GGNMOS transistor and electrically coupled to the source region of the second GGNMOS transistor;
- a second body contact region electrically connected to the body region of the second GGNMOS transistor and non substrate isolated from first body contact region of the second GGNMOS transistor;
- wherein the second body contact region of the first GGNMOS transistor is electrically connected to the second body contact region of the second GGNMOS transistor.
8 more elements
A semiconductor die comprising:
- a first line;
- a second line;
- a clamp device for electrically connecting the first line to the second line to discharge ESD current from the first line to the second line during an ESD event affecting the first line, the clamp device including:
- a first grounded gate NMOS (GGNMOS) transistor including:
- a body region in a substrate;
- a drain region in the substrate electrically coupled to the first line;
- a source region in the substrate electrically coupled to the second line;
- a first body contact region electrically connected to the body region of the first GGNMOS transistor and electrically coupled to the source region of the first GGNMOS transistor;
- a second body contact region electrically connected to the body region of the first GGNMOS transistor and non substrate isolated from first body contact region of the first GGNMOS transistor;
- a second GGNMOS transistor including:
- a drain region in the substrate electrically coupled to the first line;
- a body region in the substrate;
- a source region in the substrate electrically coupled to the second line;
- a first body contact region electrically connected to the body region of the second GGNMOS transistor and electrically coupled to the source region of the second GGNMOS transistor;
- a second body contact region electrically connected to the body region of the second GGNMOS transistor and non substrate isolated from first body contact region of the second GGNMOS transistor;
- wherein the second body contact region of the first GGNMOS transistor is electrically connected to the second body contact region of the second GGNMOS transistor.
13 more elements
An electrostatic discharge (ESD) circuit comprising:
- a first grounded gate NMOS (GGNMOS) transistor including:
- a body region in a substrate;
- a drain region in the substrate;
- a source region in the substrate;
- a first body contact region electrically connected to the body region of the first GGNMOS transistor and electrically coupled to the source region of the first GGNMOS transistor;
- a second body contact region electrically connected to the body region of the first GGNMOS transistor and non substrate isolated from first body contact region of the first GGNMOS transistor;
- a second GGNMOS transistor substrate isolated from the first GGNMOS transistor, the second GGNMOS transistor including:
- a body region in the substrate;
- a drain region in the substrate;
- a source region in the substrate;
- a first body contact region electrically connected to the body region of the second GGNMOS transistor and electrically coupled to the source region of the second GGNMOS transistor;
- a second body contact region electrically connected to the body region of the second GGNMOS transistor and non substrate isolated from first body contact region of the second GGNMOS transistor;
- wherein the second body contact region of the first GGNMOS transistor is electrically connected to the second body contact region of the second GGNMOS transistor by at least an interconnect;
- a first line, the drain region of the first GGNMOS transistor and the drain region of the second GGNMOS transistor are electrically coupled to the first line;
- a second line, the source region of the first GGNMOS transistor and the source region of the second GGNMOS transistor are electrically coupled to the second line.
12 more elements
Dependencies are inferred from the claim text.