High-temperature implant for gate-all-around devices

Abstract

Approaches herein provide devices and methods for forming gate-all-around transistors with improved NBTI. One method may include forming a gate-all-around (GAA) stack including a plurality of alternating first layers and second layers, and forming a source/drain (S/D) cavity through the plurality of alternating first layers and second layers. The method may further include forming an inner spacer in the S/D cavity, adjacent the plurality of alternating first layers and second layers, performing a first implant by directing fluorine ions to the GAA stack, through the S/D cavity, and forming a S/D material in the S/D cavity following the first implant.

Dependencies are inferred from the claim text.