3dic package with interposer formed by spin on process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorWen-Shiang LIAO
Life of this patent
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Abstract
A method includes following steps. A silicon oxide layer is formed on a temporary carrier. The silicon oxide layer is etched to form through vias (TVs) penetrating through the silicon oxide layer. The TVs are filled with a conductive material to form conductive TVs. The temporary carrier from a first surface of the silicon oxide layer. An under bump metallurgy (UBM) layer is formed contacting a first surface of the conductive material. An interface between the UBM layer and the conductive material is coplanar with the first surface of the silicon oxide layer.
Claims20
A method, comprising:
- forming a silicon oxide layer on a temporary carrier;
- etching the silicon oxide layer to form through vias (TVs) penetrating through the silicon oxide layer;
- filling the TVs with a conductive material to form conductive TVs;
- removing the temporary carrier from a first surface of the silicon oxide layer;
- and
- forming an under bump metallurgy (UBM) layer contacting a first surface of the conductive material, wherein an interface between the UBM layer and the conductive material is coplanar with the first surface of the silicon oxide layer.
A method, comprising:
- spin coating a material over a temporary carrier;
- curing the material to form a silicon oxide layer over the temporary carrier;
- etching the silicon oxide layer to form through vias (TVs) penetrating through the silicon oxide layer;
- filling the TVs with a conductive material to form conductive TVs;
- removing the temporary carrier from a first surface of the silicon oxide layer;
- and
- forming an under bump metallurgy (UBM) layer contacting a first surface of the conductive material, wherein an interface between the UBM layer and the conductive material is coplanar with the first surface of the silicon oxide layer.
A method comprising:
- forming a silicon oxide layer on a temporary carrier;
- etching the silicon oxide layer to form openings extending through the silicon oxide layer;
- depositing a conductive material in the openings to form conductive through vias (TVs);
- forming redistribution lines (RDLs) over a first surface of the silicon oxide layer;
- removing the temporary carrier from a second surface of the silicon oxide layer opposite to the first surface, such that the second surface of the silicon oxide layer is exposed;
- and
- forming an under bump metallurgy (UBM) layer on the second surface of the silicon oxide layer.
Dependencies are inferred from the claim text.