Host-preferred memory operation

A memory system comprising:

• a memory interface to control a memory device;
• an external interface to receive a host request from a host for the memory device;
• a near-memory accelerator to perform on operation on data represented in the memory device;
• an internal interface to receive an internal request from the near-memory accelerator;
• and
• a memory side cache with processing circuitry configured to:
• maintain a host queue and an internal queue;
• detect that the host request and the internal request both correspond an element in a cache set of the memory side cache that is unavailable;
• enqueue, based on detecting that the host request and the internal request both correspond to the element in the cache set that is unavailable, the host request in the host queue and the internal request in the internal queue;
• and
• dequeue, based on the element of the cache set becoming available, the host request from the host queue before dequeuing the internal request from the internal queue for completion of the host request and the internal request.