Semiconductor device having pad electrode equipped with low pass filter circuit

An apparatus comprising:

• an internal pad electrode;
• an input buffer circuit;
• and
• a passgate circuit including first and second signal paths operatively connected between the internal pad electrode and the input buffer circuit in parallel,
• wherein the first and second signal paths are different in resistance value from each other, and
• wherein the first signal path is electrically connected between the internal pad electrode and the input buffer when a first control signal is activated and is electrically disconnected between the internal pad electrode and the input buffer when the first control signal is deactivated.

An apparatus comprising:

• a pad electrode;
• an input buffer circuit;
• and
• a passgate circuit including a first plurality of transistors coupled in parallel between the pad electrode and the input buffer circuit and a second plurality of transistors coupled in series between the pad electrode and the input buffer circuit,
• wherein the first plurality of transistors are brought into an ON state in a first mode, and
• wherein the second plurality of transistors are brought into an ON state in a second mode.