Probe card for device under test

A probe card comprising:

• a voltage terminal configured to be coupled to a voltage supply;
• a current terminal configured to be coupled to a current supply, wherein the voltage terminal and the current terminal are configured to be coupled to an input node of a device under test (DUT) field effect transistor (FET) mounted on a wafer through probe needles;
• an overlap resistor capacitor (RC) element coupled to an electrically neutral node and to the input node of the DUT FET, the overlap RC element being configured to inject overlap current into the input node of the DUT FET in response to the DUT FET transitioning from a cutoff region to a linear region, and the current supply is configured to inject a current into the input node of the DUT FET in response to depletion of the overlap current during an interval of time that the DUT FET is operating in the linear region;
• an analog to digital (ADC) voltage capture module configured to capture a voltage between an input node and an output node of the DUT FET;
• a resistive element configured to be coupled to the output node of the DUT FET and to an electrically neutral node through the probe needles;
• an ADC current capture module coupled in parallel to the resistive element configured to measure a current across the resistive element;
• and
• a driver configured to be coupled to a gate of the DUT FET through the probe needles, wherein the probe card is configured to repeatedly switch the DUT FET from a cutoff region to a linear region while a voltage and current is applied to the input node of the DUT FET.