Transistor with embedded insulating structure set

A transistor with an embedded insulating structure set, comprising:

• a substrate, wherein the substrate comprises an active region;
• a gate disposed within the active region;
• a gate dielectric layer disposed between the gate and the active region;
• a first lightly doped region disposed within the active region at one side of the gate;
• a second lightly doped region disposed within the active region at another side of the gate, wherein the first lightly doped region and the second lightly doped region have a same conductive type, and wherein by taking a symmetrical line of the gate as a given axis, the first lightly doped region is symmetrical to the second lightly doped region;
• a first source/drain doped region disposed within the first lightly doped region;
• a second source/drain doped region disposed within the second lightly doped region;
• and
• a first insulating structure set disposed within the first lightly doped region and the first source/drain doped region, wherein the first insulating structure set comprises a first insulating block embedded within the substrate and a sidewall of the first insulating block contacts the gate dielectric layer.