Strip substrate and semiconductor package including the same

A semiconductor package, comprising:

• a package substrate comprising a lateral surface, a top surface, and a bottom surface opposite to the top surface;
• a semiconductor chip on the top surface of the package substrate;
• and
• a solder terminal on the bottom surface of the package substrate,
• wherein the package substrate includes:
• a dielectric layer;
• a solder pad between the solder terminal and the dielectric layer;
• a conductive dummy pattern on the dielectric layer, wherein the conductive dummy pattern extends from the solder pad toward the lateral surface of the package substrate, and wherein a portion of the conductive dummy pattern is exposed at the lateral surface of the package substrate;
• and
• a plurality of power/ground patterns proximate to the lateral surface and on the dielectric layer,
• wherein the conductive dummy pattern is between the plurality of power/ground patterns,
• wherein each of the plurality of power/ground patterns includes:
• a first part;
• and
• a second part between the first part and the lateral surface of the package substrate,
• wherein a first distance between the first part and the conductive dummy pattern in a first direction is constant,
• wherein a second distance between the second part and the conductive dummy pattern in a second direction increases as a third distance between the second part and the lateral surface of the package substrate in the first direction decreases, and
• wherein the second direction intersects the first direction.

A strip substrate, comprising:

• a dielectric layer;
• a saw line pattern that extends in a first direction on the dielectric layer;
• a plurality of metal plate patterns spaced apart from each other in the first direction;
• a solder pad on the dielectric layer;
• a conductive dummy pattern that extends from the solder pad and between the plurality of metal plate patterns, wherein the conductive dummy pattern is connected to the saw line pattern;
• and
• a dielectric protection layer on the dielectric layer, the saw line pattern, the plurality of metal plate patterns, and the conductive dummy pattern,
• wherein a first distance between the plurality of metal plate patterns and the conductive dummy pattern is in a range of about 10 micrometers to about 30 micrometers,
• wherein a second distance between the plurality of metal plate patterns and the saw line pattern is in a range of about 50 micrometers to about 150 micrometers, and
• wherein each of the plurality of metal plate patterns comprises a chamfer shape at a corner proximate to an intersection of the saw line pattern and the conductive dummy pattern.