Memory device, operating method of memory device, and memory system
AssigneeSK hynix Inc.
InventorsHyung Jin CHOI, Chan Sik PARK, Chan Hui JEONG
Life of this patent
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AssigneeSK hynix Inc.
InventorsHyung Jin CHOI, Chan Sik PARK, Chan Hui JEONG
Estimating the term…
A memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit including a plurality of page buffers respectively connected to the plurality of memory cells through a plurality of bit lines and a voltage generating circuit for selectively outputting a program voltage and a verify voltage; and a control circuit configured to control the peripheral circuit to perform a plurality of program loops each including a program voltage apply operation and a verify operation. Each of the plurality of page buffers may include: a first latch for storing a verify result according to the verify operation of an nth program loop among the plurality of program loops; and a second latch for storing a verify result according to the verify operation of an (n−1)th program loop among the plurality of program loops.
A memory device comprising:
A method of operating a memory device, the method comprising:
A memory system comprising:
Dependencies are inferred from the claim text.