Power mosfet device with protection against the contaminants and related manufacturing process

A process for manufacturing a metal oxide semiconductor field effect transistor (MOSFET) device comprising:

• forming a plurality of source regions of a first conductivity type in a semiconductor body;
• forming a plurality of body regions of a second conductivity type in the semiconductor body, the plurality of body regions including a plurality of channel regions;
• forming a drain region of the first conductivity type in the semiconductor body;
• forming a plurality of insulated gate regions, each of the plurality of insulated gate regions including:
• a gate conductive region;
• and
• a gate dielectric region partially interposed between the gate conductive region and a corresponding source regions and partially interposed between the gate conductive region and a corresponding channel region;
• and
• forming a plurality of barrier structures, each of the plurality of barrier structures extending on a corresponding insulated gate region and including a barrier region of silicon nitride.

A device, comprising:

• a substrate including:
• a drain region having a first conductivity type;
• first and second body regions having a second conductivity type and in the drain region, the first and second body regions separated from each other by a portion of the drain region;
• and
• first and second source regions having the first conductivity type, the first and second source regions in the first and second body regions, respectively;
• an insulated gate region directly overlying the portion of the drain region;
• and
• a first barrier region on the insulated gate region.