Semiconductor apparatus, method of manufacturing semiconductor apparatus, and electronic device including semiconductor apparatus

A method of manufacturing a semiconductor apparatus, comprising:

• disposing a stack comprising n device layers on a substrate, wherein each device layer comprises a first source/drain layer, a channel defining layer and a second source/drain layer which are stacked in sequence, and n is an integer greater than or equal to 2;
• forming a step structure on a side of the stack in a first direction, wherein a step is formed by a lower device layer relative to an upper device layer;
• recessing, on two opposite sides in the first direction, the channel defining layer in each device layer in the first direction relative to the first source/drain layer and second source/drain layer in each device layer, so as to obtain a first gap, and forming a first sacrificial gate in the first gap;
• recessing, on a side of the stack in a second direction intersecting with the first direction, the channel defining layer in each device layer in the second direction relative to the first source/drain layer and second source/drain layer in each device layer, so as to obtain a second gap;
• forming a channel layer on a sidewall of a recess of each channel defining layer;
• forming a second sacrificial gate in a space of the second gap after forming the channel layer;
• forming, on the side of the stack in the second direction, a step structure in each device layer:
• a sub-step is formed by each second sacrificial gate relative to the second source/drain layer in a corresponding device layer;
• removing, on another side of the stack opposite to the side of the stack in the second direction, the channel defining layer by selectively etching, so as to obtain a third gap, and forming a third sacrificial gate in the third gap;
• forming, on the another side of the stack in the second direction, a step structure in each device layer:
• a sub-step is formed by the first source/drain layer relative to the second source/drain layer and channel defining layer in a same device layer, and the sub-step is on the step formed in the corresponding device layer;
• and
• replacing the first sacrificial gate, the second sacrificial gate and the third sacrificial gate by a gate stack.