Array substrate and display panel

Abstract

The present disclosure provides an array substrate and a display panel containing the array substrate. The array substrate includes a pixel area and a fan-out area. The pixel area includes a plurality of thin film transistors arranged in a multi-row and multi-column array. The fan-out area includes a plurality of sub-fan-out areas, each of the plurality of sub-fan-out areas is arranged corresponding to a row of the plurality of thin film transistors, and each of the plurality of sub-fan-out areas is connected to a row of thin film transistors corresponding to the corresponding row of thin film transistors by a plurality of M1 traces. Wherein, transverse lengths of a portion of the plurality of M1 traces in at least one of the plurality of sub-fan-out areas are the same, so that a picture uniformity of the display panel can be improved.

Dependencies are inferred from the claim text.