Electronic circuit for delivering signals in quadrature

A device comprising:

• a first conversion circuit comprising a first input node, a first output node, a first inverter having an output coupled to the first output node, a first resistor coupling an input of the first inverter to the output of the first inverter, and a first capacitive element coupling the first input node to the input of the first inverter;
• a second conversion circuit comprising a second input node, a second output node, a second inverter having an output coupled to the second output node, a second resistor coupling an input of the second inverter to the output of the second inverter, and a second capacitive element coupling the second input node to the input of the second inverter;
• and
• a current mode logic gate having a first input coupled to the first output node and a second input coupled to the second output node, the current mode logic gate comprising:
• a reference node, a power supply node, a first node, a second node, a third node, a fourth node, a fifth node, and a sixth node;
• a first transistor having a current path coupled between the reference node and the first node and having a gate;
• a second transistor having a current path coupled between the first and second nodes and having a gate coupled to the third node;
• a first resistor coupling the second node to the power supply node;
• a third transistor having a current path coupled between the first and third nodes and having a gate coupled to the fourth node;
• a second resistor coupling the third node to the power supply node;
• a fourth transistor having a current path coupled between the reference node and the fifth node and having a gate;
• a fifth transistor having a current path coupled between he fifth and fourth nodes and having a gate coupled to the sixth node;
• a third resistor coupling the sixth node to the power supply node;
• a sixth transistor having a current path coupled between the fifth and sixth nodes and having a gate coupled to the second node;
• and
• a fourth resistor having a current path coupling the fourth node to the power supply node.

A method comprising:

• receiving a first sine wave signal and a second sine wave signal in quadrature with respect to each other, the first and second sine wave signals each having a DC component;
• generating a first square wave signal having a first level in the case that the first sine wave signal is positive with respect to its DC component and a second level otherwise;
• generating a second square wave signal having a first level in the case that the second sine wave signal is positive with respect to its DC component and a second level otherwise;
• generating a third square wave signal and a fourth square wave signal;
• wherein the third square wave signal is at a first level and the fourth square wave signal is at a second level when the first and second square wave signals are simultaneously at their first levels and the first square wave signal is ahead of the second square wave signal;
• and
• wherein the third square wave signal is at a second level and the fourth square wave signal is at a first level when the first and second square wave signals are simultaneously at their first levels and the second square wave signal is ahead of the first square wave signal.