Processor Cluster Address Generation

A computer program product embodied in a non-transitory computer readable medium for data manipulation, the computer program product comprising code which causes one or more processors to perform operations of:

• accessing one or more processors capable of executing software-initiated work requests;
• flattening a tensor having a plurality of dimensions into a single dimension;
• parsing a work request address field, wherein the address field contains unique address space descriptors for each of the plurality of dimensions of the tensor along with a common address space descriptor;
• generating addresses, based on the unique address space descriptors and the common address space descriptor;
• accessing memory, using two or more of the addresses that were generated, at the respective locations in memory specified by the two or more addresses;
• and
• providing, to the one or more processors, data at the accessed respective locations in memory specified by the two or more addresses.

A computer system for data manipulation comprising:

• a memory which stores instructions;
• one or more processors coupled to the memory wherein the one or more processors, when executing the instructions which are stored, are configured to:
• access one or more processors capable of executing software-initiated work requests;
• flatten a tensor having a plurality of dimensions into a single dimension;
• parse a work request address field, wherein the address field contains unique address space descriptors for each of the plurality of dimensions of the tensor along with a common address space descriptor;
• generate addresses, based on the unique address space descriptors and the common address space descriptor;
• access memory, using two or more of the addresses that were generated, at the respective locations in memory specified by the two or more addresses;
• and
• provide, to the one or more processors, data at the accessed respective locations in memory specified by the two or more addresses.