Phase synchronization between timers
AssigneeIntel Corporation
InventorsMark BORDOGNA, Zoltan FODOR
Life of this patent
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AssigneeIntel Corporation
InventorsMark BORDOGNA, Zoltan FODOR
Estimating the term…
Examples described herein relate to a first network interface controller comprising a first network interface, first timer, and a first signal transceiver and circuitry to reduce offset between the first timer of the first network interface controller and a second timer of a second network interface controller. The circuitry to reduce offset between the first timer of the first network interface controller and a second timer of a second network interface controller based on a first signal transmitted over a communication line from the first signal transceiver to the second network interface controller and also based on the first signal transmitted from the second network interface controller back to the first network interface controller over the communication line.
An apparatus comprising:
A method comprising:
At least one non-transitory computer-readable medium comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to:
Dependencies are inferred from the claim text.