Stochastic Rounding Switched Capacitor Computation Cores Useful for Efficient Deep Learning Inference
AssigneeInternational Business Machines Corporation
InventorsChia-Yu CHEN, Ankur Agrawal, Andrea Fasoli, Kyu-hyoun Kim
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Abstract
An apparatus includes multiple analog to digital converters. Individual analog to digital converters are configured to produce a digital output from an analog input and configured to compute a least significant bit of the digital output by comparing an internal residual voltage for determination of the least significant bit and a residual voltage from another analog to digital converter.
Claims17
An apparatus, comprising:
- multiple analog to digital converters, wherein individual analog to digital converters are configured to produce a digital output from an analog input and configured to compute a least significant bit of the digital output by comparing an internal residual voltage for determination of the least significant bit and a residual voltage from another analog to digital converter.
The apparatus according to claim 10, wherein the multiple analog to digital converters are configured to perform computations in parallel.
Dependencies are inferred from the claim text.