High voltage device with linearizing field plate configuration
AssigneeGlobalFoundries U.S. Inc.
InventorsSantosh Sharma, Johnatan Avraham Kantarovsky, Rajendran Krishnasamy
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AssigneeGlobalFoundries U.S. Inc.
InventorsSantosh Sharma, Johnatan Avraham Kantarovsky, Rajendran Krishnasamy
Estimating the term…
An integrated circuit (IC) having a high voltage semiconductor device with a plurality of field plates between the gate and drain. The IC further includes a biasing circuit electrically coupled to each of the plurality of field plates, the biasing circuit including a plurality of high voltage depletion mode transistors, each having a pinch off voltage. The high voltage depletion mode transistors may have different pinch off voltages, and each of the field plates are each independently biased by a different one of the high voltage depletion mode transistors.
An integrated circuit, comprising:
A biasing circuit for a semiconductor device having a plurality of field plates between a gate and a drain of the semiconductor device, comprising:
A biasing circuit for a semiconductor device having a plurality of field plates between a gate and a drain of the semiconductor device, comprising:
Dependencies are inferred from the claim text.