Semiconductor structure including multiple gate electrodes
AssigneeNanya Technology Corporation
InventorJHEN-YU TSAI
Life of this patent
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Abstract
The present disclosure provides a semiconductor structure. The semiconductor structure includes: a first doped structure over a substrate and a second doped structure over the first doped structure and the substrate; a first gate layer, at last partially disposed between the first doped structure and the second doped structure; a first gate dielectric layer, surrounding the first gate layer; a channel layer, surrounding the first gate dielectric layer; a second gate dielectric layer, surrounding the channel layer; and a second gate layer, surrounding the second gate dielectric layer. A manufacturing method for forming the same is also provided.
Claims20
A semiconductor structure, comprising:
- a first doped structure over a substrate and a second doped structure over the first doped structure and the substrate;
- a first gate layer, at last partially disposed between the first doped structure and the second doped structure;
- a first gate dielectric layer, surrounding the first gate layer;
- a channel layer, surrounding the first gate dielectric layer;
- a second gate dielectric layer, surrounding the channel layer;
- and
- a second gate layer, surrounding the second gate dielectric layer.
A semiconductor structure, comprising:
- a vertical gate-all-around (GAA) structure, comprising:
- a gate structure, comprising:
- an inner gate;
- an inner oxide, surrounding the inner gate;
- a channel layer, surrounding the inner oxide;
- an outer oxide, surrounding the channel layer;
- and
- an outer gate, surrounding the outer oxide;
- and
- a first doped structure and a second doped structure, disposed at two opposite sides of the gate structure respectively;
- a first contact, electrically connected to the inner gate;
- and
- a second contact, electrically connected to the outer gate.
Dependencies are inferred from the claim text.