Dielectric barrier for backside interconnect separation
AssigneeIntel Corporation
InventorsGuillaume Bouche, Bilal Chehab, Lars Liebmann, Quan Shi
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AssigneeIntel Corporation
InventorsGuillaume Bouche, Bilal Chehab, Lars Liebmann, Quan Shi
Estimating the term…
Techniques are provided herein to form semiconductor devices having a dielectric wall or spine between two devices that extends between source or drain regions of the two devices and separates backside contacts to the source or drain regions. A first semiconductor device includes a first semiconductor region extending from a first source or drain region and a second adjacent semiconductor device includes a second semiconductor region extending from a second source or drain region adjacent to the first source or drain region. A dielectric wall extends between the first source or drain region and the second source or drain region. A first backside contact touches the underside of the first source or drain region and a second backside contact touches the underside of the second source or drain region. The dielectric wall further extends down between the first conductive contact and the second conductive contact.
An integrated circuit comprising:
An electronic device, comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.