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US 2024/0204057 A1Published application
Methods for forming semiconductor stacked structures on a substrate and related semiconductor structures
AssigneeASM IP Holding B.V.
InventorsAmir Kajbafvala, Yanfu Lu, Caleb Miskin
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Abstract
Methods for forming semiconductor stacked structures are disclosed. The methods may include, seating a substrate within a chamber body, and regulating a temperature profile across an upper surface of the substrate during each individual step of a sequential deposition process. Semiconductor stacked structures including two or more bilayers of SiGe/Si with intervening interface layers are also disclosed.
Claims20
A method for forming a semiconductor structure, the method comprising:
- seating a substrate within a chamber body;
- regulating a temperature profile across an upper surface of the substrate during each individual process step of a sequential deposition process by employing a feedback control procedure comprising;
- acquiring at least two independent sets of optical temperature measurements from at least two separate areas on the upper surface of the substrate;
- and
- throttling heating of the substrate according to a temperature differential or a temperature gradient across the upper surface of the substrate as determined by the at least two independent sets of optical temperature measurements;
- and
- depositing a semiconductor stacked structure on the substrate by performing two or more sequences of a sequential deposition process, wherein each sequence of the sequential deposition process comprises at least process steps of:
- introducing a first precursor gas into the chamber body to epitaxially deposit a first layer comprising silicon and germanium on the substrate;
- subsequently introducing a transition gas into the chamber body to passivate an exposed surface of the first layer;
- and
- subsequently introducing a second precursor gas into the chamber body to epitaxially deposit a second layer comprising silicon over the first layer.
8 more elements
A method for forming a semiconductor stacked structure on a surface of a substrate, the method comprising:
- seating a substrate on a substrate support disposed in a chamber body, the chamber body having an upper wall and a lower wall;
- heating the substrate to a deposition temperature employing an upper heater element array supported above the upper wall of the chamber body and a lower heater element array supported below the lower wall of the chamber body;
- providing a controller in communication with at least the upper heater element array, wherein the controller throttles power to at least the upper heater element array according to a set of optical temperature measurements communicated to the controller from at least a first pyrometer and a second pyrometer, the first pyrometer and the second pyrometer being supported above the upper heater element array and being optically coupled to the substrate surface over at least a first acquisition area and a second acquisition area, wherein the second acquisition area is radially distal from the first acquisition area;
- and
- depositing two or more silicon germanium (Si1-xGex)/silicon (Si) bilayers on the substrate by a sequential deposition process, wherein a unit sequence of the sequential deposition process comprises at least process steps of:
- epitaxially deposit a silicon germanium (Si1-xGex) layer over the substrate;
- introducing a transition gas comprising a chlorine containing gas into the chamber body for set time period;
- epitaxially depositing a silicon (Si) layer over the silicon germanium (Si1-xGex) layer;
- and
- forming an interface layer disposed between the silicon germanium (Si1-xGex) layer and the silicon (Si) layer, wherein the interface layer has an average thickness of less than 10 Angstroms.
7 more elements
A semiconductor structure comprising:
- a substrate;
- two or more bilayers disposed directly one on top of one another to form a semiconductor stacked structure, wherein a single bilayer comprises;
- a silicon germanium (Si1-xGex) layer;
- a silicon (Si) layer disposed over the silicon germanium (Si1-xGex) layer;
- and
- an interface layer disposed directly between silicon germanium (Si1-xGex) layer and the silicon (Si) layer,
- wherein each interface layer within the semiconductor stacked structure has an average layer thickness of less than 10 Angstroms.
4 more elements
Dependencies are inferred from the claim text.