Silicon carbide semiconductor device

A silicon carbide semiconductor device in which a main current flows in a thickness direction of a silicon carbide substrate, comprising:

• a semiconductor layer of a first conductivity type provided on a first main surface of the silicon carbide substrate;
• a first well region of a second conductivity type provided in an upper layer part of the semiconductor layer and having a stripe shape extending in a first direction;
• a first impurity region of the first conductivity type provided in an upper layer part of the first well region;
• at least one first well contact region of the second conductivity type provided in the upper layer part of the first well region and having a side surface joined to the first impurity region;
• a first contact electrically connected to the first impurity region and the at least one first well contact region and electrically connected to a first main electrode provided over the semiconductor layer;
• a second well region of the second conductivity type having a stripe shape separated from the first well region in a second direction perpendicular to the first direction and extending in the first direction;
• at least one second well contact region of the second conductivity type provided in an upper layer part of the second well region;
• a second impurity region of the first conductivity type provided in the upper layer part of the second well region, joined to a side surface of the at least one second well contact region, and having an area smaller than that of the first impurity region in a plan view;
• a second contact electrically connected to the at least one second well contact region and electrically connected to the first main electrode provided over the semiconductor layer;
• and
• a second main electrode provided on a second main surface of the silicon carbide substrate on an opposite side to the first main surface, wherein
• in an area in which the first well region and the second well region are adjacent to each other, a gate electrode is provided across a gate insulating film provided on a peripheral portion of the first impurity region, on the first well region, on the semiconductor layer, and on a peripheral portion of the second well region.