Semiconductor device structure and methods of forming the same

A semiconductor device structure, comprising:

• a silicon substrate comprising a bulk silicon region and a silicon-on-insulator (SOI) region;
• a first shallow trench isolation (STI) disposed on the silicon substrate to isolate the bulk silicon region from the SOI region;
• a first metal oxide semiconductor field effect transistor (MOSFET) device disposed at the bulk silicon region, the first MOSFET device comprising a bulk semiconductor layer in contact with the silicon substrate;
• a second STI disposed to surround the first STI;
• a second MOSFET device disposed at the SOI region between the first STI and the second STI, the second MOSFET device comprising a semiconductor layer in contact with the first STI and the second STI;
• and
• an insulator layer disposed between and in contact with the semiconductor layer and the silicon substrate.

A method for forming a semiconductor device structure, comprising:

• forming sequentially an insulator layer and a semiconductor layer on a semiconductor substrate;
• forming a trench through a portion of the semiconductor layer and the insulator layer, the trench exposing sidewalls of the semiconductor layer and the insulator layer and a top surface of the semiconductor substrate;
• forming a spacer layer on the sidewalls of the semiconductor layer and the insulator layer, wherein the spacer layer has a first height;
• providing a first metal oxide semiconductor field effect transistor (MOSFET) device at a first region of the semiconductor substrate by:
• forming a bulk semiconductor layer in the trench so that the bulk semiconductor layer is in contact with the spacer layer and a portion of the semiconductor substrate;
• forming a first gate structure over the bulk semiconductor layer, wherein the bulk semiconductor layer below the first gate structure has a second height;
• and
• forming first source/drain (S/D) regions in the bulk semiconductor layer on opposite sides of the first gate structure;
• providing a second MOSFET device at a second region of the semiconductor substrate by:
• forming a second gate structure over the semiconductor layer, wherein the semiconductor layer below the second gate structure has a third height different than the second height;
• and
• forming second S/D regions in the semiconductor layer on opposite sides of the second gate structure,
• wherein a portion of the spacer layer is disposed between and in contact with the insulator layer and the bulk semiconductor layer.