Structure and method to form a stack field effect transistor with different channel oriented gate-all-around devices

A semiconductor device, comprising:

• a semiconductor substrate comprising an uppermost surface and a vertical fin extending upwardly from the uppermost surface;
• shallow trench isolation (STI) aside the vertical fin;
• a vertically stacked gate-all-around (GAA) nanosheet (NS) field effect transistor (FET) structure disposed on the vertical fin;
• a dielectric layer disposed on the vertically stacked GAA NS FET structure;
• a horizontally stacked GAA NS FET structure disposed on a portion of the dielectric layer;
• and
• high-k metal gate material surrounding the vertically stacked GAA NS FET structure and the horizontally stacked GAA NS FET structure.

A semiconductor device fabrication method, comprising:

• epitaxially growing a sacrificial semiconductor channel region on a bottom device comprising a vertically stacked horizontal fin structure having sacrificial layers between interlayer dielectric (ILD);
• patterning the sacrificial semiconductor channel region to a vertical fin structure;
• disposing a dielectric layer between the vertical fin structure and the vertically stacked horizontal fin structure;
• recessing the ILD to reveal the vertical fin structure;
• epitaxially growing vertical sacrificial layers and semiconductor layers horizontally on the vertical fin structure to form a horizontally stacked vertical fin structure;
• execution of dummy gate, inner spacer and source/drain (S/D) formation;
• and
• removing the sacrificial layers from the vertically stacked horizontal fin structure and from the horizontally stacked vertical fin structure.