Stacked cmos devices with two dielectric materials in a gate cut

A semiconductor structure comprising:

• a plurality of cells of complementary field-effect transistor (CFET) devices, wherein the CFET devices each have a top transistor under a bottom transistor,
• a first dielectric material abuts a portion of each channel in the top transistor of a first CFET device in a first cell of the CFET devices and abuts a portion of each channel in the top transistor of a second CFET device in a second cell of the CFET devices adjacent to the first cell, wherein the first dielectric material has a fixed charge with a first polarity;
• and
• a second dielectric material abuts a portion of each channel in the bottom transistor of the first CFET device in the first cell of the CFET devices and abuts a portion of each channel in the bottom transistor of the second CFET device in the second cell of the CFET devices, wherein the second dielectric material has the fixed charge with a second polarity.

A method of forming a complementary field-effect transistor (CFET) device, the method comprising:

• epitaxially growing a nanosheet stack on a semiconductor substrate;
• selectively etching the nanosheet stack and a top portion of the semiconductor substrate;
• forming shallow trench isolations (STI) in the semiconductor substrate adjacent to remaining portions of the nanosheet stack;
• forming at least two stacked gate-all-around field-effect transistors separated by a middle dielectric isolation material on the semiconductor substrate, wherein more than one first transistor is under the middle dielectric isolation material and more than one second transistor is above the middle dielectric isolation material;
• performing gate cuts through a portion of each gate that is between the more than one first transistors and more than one second transistors, wherein the gate cuts go through the STI adjacent to the more than one first transistors and the top portion of the semiconductor substrate;
• filling the gate cuts with a first dielectric material;
• recessing the first dielectric material;
• depositing a second dielectric material;
• and
• performing a planarization.