Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsSHLE-GE LEE, HYUNGGIL BAEK, GYUNGHWAN OH
Life of this patent
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Abstract
A semiconductor package includes a lower substrate that has a contact region and a non-contact region, a first upper substrate on the lower substrate, a lower device on the first upper substrate, a plurality of first solder balls between the first upper substrate and the lower substrate contact region, a plurality of capacitors between the first upper substrate and the lower substrate non-contact region, and a plurality of support blocks between the plurality of capacitors and the lower substrate non-contact region.
Claims20
A semiconductor package, comprising:
- a lower substrate comprising a contact region and a non-contact region, wherein the contact region extends around the non-contact region;
- a first upper substrate on the lower substrate;
- a lower device on the first upper substrate;
- a plurality of first solder balls between the first upper substrate and the lower substrate contact region;
- a plurality of capacitors between the first upper substrate and the lower substrate non-contact region;
- and
- a plurality of support blocks between the plurality of capacitors and the lower substrate non-contact region.
A semiconductor package, comprising:
- a lower substrate comprising a contact region and a non-contact region, wherein the contact region extends around the non-contact region;
- a first upper substrate on the lower substrate;
- a lower device on the first upper substrate;
- a plurality of first solder balls between the first upper substrate and the lower substrate contact region;
- a plurality of passive devices between the first upper substrate and the lower substrate non-contact region;
- a first underfill layer between the plurality of first solder balls;
- and
- a plurality of support blocks between the lower substrate non-contact region and the plurality of passive devices, wherein the plurality of support blocks have a thermal expansion coefficient less than a thermal expansion coefficient of the first underfill layer.
A semiconductor package, comprising:
- a lower substrate comprising a contact region and a non-contact region, wherein the contact region extends around the non-contact region;
- a first upper substrate on the lower substrate;
- a lower device on the first upper substrate;
- a plurality of first solder balls between the first upper substrate and the lower substrate contact region;
- a plurality of passive devices between the first upper substrate and the lower substrate non-contact region;
- a first underfill layer between the plurality of first solder balls;
- a plurality of support blocks between the lower substrate non-contact region and the plurality of passive devices, wherein the plurality of support blocks have a thermal expansion coefficient less than a thermal expansion coefficient of the first underfill layer;
- a second upper substrate on the lower device and the first upper substrate;
- a plurality of second solder balls between the first and second upper substrates;
- and
- a second underfill layer between the lower device and the plurality of second solder balls, wherein the second underfill layer has a thermal expansion coefficient less than the thermal expansion coefficient of the first underfill layer.
Dependencies are inferred from the claim text.