Semiconductor package

A semiconductor package comprising:

• a substrate including a first area and a second area spaced apart from the first area;
• a first semiconductor chip stack disposed in the first area and including a plurality of first semiconductor chips stacked on each other;
• a second semiconductor chip stack disposed in the second area and including a plurality of second semiconductor chips stacked on each other;
• a first spacer disposed on the first semiconductor chip stack in the first area and including a silicon layer and a coupling layer disposed on the silicon layer;
• and
• a mold layer in contact with a first surface of the first spacer and a first surface of the second semiconductor chip stack.

A semiconductor package comprising:

• a substrate extending in first and second directions that intersect each other;
• a first semiconductor chip stack disposed on the substrate and including a plurality of first semiconductor chips stacked on each other;
• a second semiconductor chip stack disposed on the substrate, and spaced apart from the first semiconductor chip stack in the first direction, wherein the second semiconductor chip stack includes a plurality of second semiconductor chips stacked on each other;
• a first spacer disposed on the first semiconductor chip stack and having a silane coupling agent;
• a mold layer covering the first and second semiconductor chip stacks;
• a controller disposed between the substrate and the second semiconductor chip stack;
• and
• a second spacer disposed between the controller and the second semiconductor chip stack.