US 2024/0203514 A1 · MEMORY DEVICES AND OPERATING METHODS THEREOF, MEMORY SYSTEM

Abstract

An example of the present disclosure provides a memory device including: a memory array and a peripheral circuit coupled with the memory array. The memory array includes memory blocks each including pages each including memory cells. The peripheral circuit includes a control logic configured to: receive the first information indicating to search the boundary page of the selected memory block in the memory blocks; the boundary page being related to the page requiring information recovery in the selected memory block; receive the address of the selected memory block; obtain the address of the boundary page in connection with the page erasing check function using the address of the selected memory block, the page erasing check function being configured to feed back whether memory cells in the page to be checked are all in the erased state.

Claims20

Dependent claims

A memory device comprising:

a memory array including memory blocks, wherein each memory block of the memory blocks comprises pages each comprising memory cells;
a peripheral circuit coupled with the memory array and comprising a control logic that is configured to:
receive a first information indicating to search a boundary page of a selected memory block in the memory blocks, the boundary page being related to a page requiring information recovery in the selected memory block;
receive an address of the selected memory block;
and
obtain an address of the boundary page in connection with a page erasing check function using the address of the selected memory block, the page erasing check function being configured to feed back whether memory cells in a page to be checked are all in an erased state.

3 more elements

A method of operating of a memory device, comprising:

receiving a first information indicating to search a boundary page of a selected memory block in a plurality of memory blocks of the memory device, the boundary page being related to a page requiring information recovery in the selected memory block;
receiving an address of the selected memory block;
and
obtaining an address of the boundary page in connection with a page erasing check function using the address of the selected memory block, the page erasing check function being configured to feed back whether memory cells in the page to be checked are all in an erased state.

1 more element

Dependencies are inferred from the claim text.

Memory devices and operating methods thereof, memory system

Life of this patent

Memory devices and operating methods thereof, memory system

Life of this patent

Abstract

Claims20