Sfgt storage array, storage chip and data-reading method

A storage chip, comprising:

• an SFGT storage array, a column-decoding module, a row-decoding module and a logic control module;
• the logic control module is connected to the SFGT storage array via the column-decoding module and the row-decoding module respectively, and is configured to perform writing and/or reading operation on the SFGT storage array on a page-by-page basis based on an access instruction;
• the SFGT storage array comprises a true semi-floating gate array, a reference semi-floating gate array and a sense amplifier;
• the true semi-floating gate array comprises a plurality of true semi-floating gate storage units, a plurality of first bit lines and a plurality of first word lines, each of the plurality of first bit lines intersects with each of the plurality of first word lines for performing operation on one of the plurality of true semi-floating gate storage units, each of the plurality of first bit lines is connected to a first input end of the sense amplifier, each of the plurality of true semi-floating gate storage units is located at an intersection position of one of the plurality of first bit lines and one of the plurality of first word line, and
• the reference semi-floating gate array comprises a plurality of second bit lines, each of the plurality of second bit lines is connected to a second input end of the sense amplifier.

A data-reading method performed by an SFGT storage array comprising a true semi-floating gate array, a reference semi-floating gate array and a sense amplifier, wherein

• the method comprises:
• obtaining a first voltage variation value of a first target bit line corresponding to a target true semi-floating gate storage unit through which a first target word line passes, the first target word line being one of a plurality of first word lines comprised in the true semi-floating gate array;
• obtaining a second voltage variation value of a second target bit line in the reference semi-floating gate array;
• controlling the sense amplifier to amplify the first voltage variation value and obtain a first amplified voltage variation value, and to amplify the second voltage variation value to obtain a second amplified voltage variation value;
• and
• reading, based on the first amplified voltage variation value and the second amplified voltage variation value, a target storage value of the target true semi-floating gate storage unit.