Negative Pull-Down Voltage in a Sense Amplifier

A memory device, comprising:

• one or more memory cells configured to store data;
• a pair of digit lines coupled to the one or more memory cells;
• and
• a sense amplifier coupled to the pair of digit lines and comprising:
• cross-coupled transistors coupled to a supply voltage;
• a first gut node coupled to a first transistor of the cross-coupled transistors, wherein the first gut node corresponds to a first digit line of the pair of digit lines;
• a second gut node coupled to a second transistor of the cross-coupled transistors, wherein the second gut node corresponds to a second digit line of the pair of digit lines;
• a third transistor coupled to the first gut node, wherein a gate of the third transistor is coupled to the second digit line;
• a fourth transistor coupled to the second gut node, wherein a gate of the fourth transistor is coupled to the first digit line;
• a fifth transistor coupled to a negative voltage, wherein a drain of the fifth transistor is coupled to the source of the third and fourth transistors;
• and
• a sixth transistor coupled to a ground voltage, wherein the drain of the sixth transistor is coupled to the source of the third and fourth transistors, wherein the negative voltage is less than the ground voltage.

A method comprising:

• receiving an instruction to perform a sensing operation via a sense amplifier;
• performing a precharging operation at least in part by sending a first control signal to a first transistor coupled between the sense amplifier and a first reference voltage to turn on the first transistor;
• determining that an n-channel node coupled to the first transistor is charged to a first voltage;
• in response to determining that the n-channel node is charged to the first voltage, transmitting a second control signal to turn off the first transistor;
• and
• performing a voltage threshold compensation associated with the sensing operation at least in part by transmitting a third control signal to turn on a second transistor coupled between the sense amplifier and a second reference voltage, wherein the first reference voltage comprises a voltage level lower than the second reference voltage.