Gate driving circuit and display device

A display device, comprising:

• a substrate;
• a plurality of subpixels disposed on the substrate;
• a plurality of scan signal lines connected to the plurality of subpixels;
• and
• a gate driving circuit connected to the plurality of scan signal lines, wherein the gate driving circuit includes a plurality of stage circuits, and wherein an nth stage circuit among the plurality of stage circuits includes:
• a scan output buffer circuit configured to receive a scan clock signal from a scan clock node, receive a low-potential voltage from a low-potential voltage node, and output a scan signal including a first signal section having a turn-off level voltage and a second signal section having a turn-on level voltage according to voltages of a Q node and a Qb node;
• a control circuit including a plurality of transistors to control the voltages of the Q node and the Qb node to control an operation of the scan output buffer circuit, the plurality of transistors including a first Q node discharge transistor turned on or off by the voltage of the Qb node to control connection between the Q node and the low-potential voltage node;
• and
• a body bias circuit configured to supply a body bias voltage to a body of the first Q node discharge transistor.