Pixel circuit and display device including the same

A pixel circuit comprising:

• a driving element including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node;
• a first switch element configured to supply an initialization voltage to a fourth node in response to a first gate signal;
• a second switch element configured to supply a data voltage to the fourth node in response to a second gate signal;
• a capacitor connected between the third node and the fourth node;
• a third switch element configured to supply a first reference voltage to the third node in response to the first gate signal;
• a fourth switch element configured to supply a pixel driving voltage to the first node in response to a third gate signal;
• a fifth switch element configured to electrically connect the fourth node with the second node in response to a fourth gate signal;
• a light emitting element configured to emit light based on a current supplied through the driving element, the light emitting element including an anode electrode connected to a fifth node and a cathode electrode configured to receive a cathode voltage that is lower than the pixel driving voltage;
• and
• a sixth switch element configured to electrically connect the third node with the fifth node in response to the fourth gate signal.

A display device comprising:

• a display panel including a plurality of data lines, a plurality of gate lines, a plurality of power lines, and a plurality of pixel circuits;
• a data driver configured to output a data voltage of pixel data to the plurality of data lines;
• and
• a gate driver configured to sequentially supply gate signals to the plurality of gate lines,
• wherein each of the plurality of pixel circuits includes:
• a driving element including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node;
• a first switch element configured to supply an initialization voltage to the second node in response to a first gate signal;
• a second switch element configured to supply a data voltage to a fourth node in response to a second gate signal;
• a capacitor connected between the third node and the fourth node;
• a third switch element configured to supply a reference voltage to the third node in response to a third gate signal;
• a fourth switch element configured to supply a pixel driving voltage to the first node in response to a fourth gate signal;
• a fifth switch element configured to electrically connect the fourth node with the second node in response to a fifth gate signal;
• a light emitting element configured to emit light based on a current supplied through the driving element, the light emitting element including an anode electrode connected to a fifth node and a cathode electrode configured to receive a cathode voltage that is lower than the pixel driving voltage;
• and
• a sixth switch element configured to electrically connect the third node with the fifth node in response to the fifth gate signal.

A display device comprising:

• a display panel including a plurality of data lines, a plurality of gate lines, a plurality of power lines, and a plurality of pixel circuits;
• a data driver configured to output a data voltage of pixel data to the plurality of data lines;
• and
• a gate driver configured to sequentially supply gate signals to the plurality of gate lines,
• wherein each of the plurality of pixel circuits includes:
• a driving element including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node;
• a first switch element configured to supply an initialization voltage to a fourth node in response to a first gate signal;
• a second switch element configured to supply a data voltage to the fourth node in response to a second gate signal;
• a capacitor connected between the third node and the fourth node;
• a third switch element configured to supply a first reference voltage to the third node in response to the first gate signal;
• a fourth switch element configured to supply a pixel driving voltage to the first node in response to a third gate signal;
• a fifth switch element configured to electrically connect the fourth node with the second node in response to a fourth gate signal;
• a light emitting element configured to emit light based a current supplied through the driving element, the light emitting element including an anode electrode connected to a fifth node and a cathode electrode configured to receive a cathode voltage that is lower than the pixel driving voltage;
• and
• a sixth switch element configured to electrically connect the third node with the fifth node in response to the fourth gate signal.