Dynamically reducing latency in processing pipelines
AssigneeNVIDIA Corporation
InventorsSau Yan Keith Li, Seth Schneider, Cody Robson, Lars Nordskog, Charles Hansen, Rouslan Dimitrov
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AssigneeNVIDIA Corporation
InventorsSau Yan Keith Li, Seth Schneider, Cody Robson, Lars Nordskog, Charles Hansen, Rouslan Dimitrov
Estimating the term…
A weighted average execution time associated with each execution stage of a plurality of execution stages used to process a plurality of frames in parallel is obtained. The processing of each of the plurality of frames is performed at each of the plurality of execution stages in a sequential order, starting with an initial execution stage and continuing with each subsequent execution stage. A first largest weighted average execution time associated with one of the plurality of execution stages is determined. A delay to the initial execution stage prior to processing a first next frame is applied. The delay is determined based on the first largest weighted average execution time.
A method comprising:
A system comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
Dependencies are inferred from the claim text.